... interrupt acknowledge ==> 批准中断 interrupt address ==> 中断地址 interrupt address register ==> 中断地址寄存器 ...
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(14) INTA ：中断响应信号(Interrupt Acknowledge)，具有三态输出功能。在最小模式 下，INTA 是8086 微处理器响应可屏蔽中断后发给请求中断的设备的回答信号，是对中断 请求信号IN...
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interrupt-acknowledge cycle 中断确认周期
INTA INTerrupt Acknowledge 中断响应
interrupt acknowledge signal 中断肯定信号 ; [计] 中断应答信号
Interrupt Acknowledge Register 中断确认寄存器
IAK Interrupt AcKnowledge 中断回答
interrupt acknowledge cycle 中断确认周期
interrupt acknowledge line 中断应答线
acknowledge interrupt 中断应答 ; [计] [通信] 应答中断 ; 中断响应 ; 肯定中断
This has undesired effects on some GIC registers, for eg GICC_IAR register can only read once to acknowledge the interrupt.
这不希望一些GIC寄存器效果，如GICC_IAR寄存器只能读一次承认中断。
The analysis and experiments shows that an interrupt must take place during the halt acknowledge cycle of the CPU.
分析与实验结果表明，中断必须发生在CPU的暂停响应阶段。
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