BIOS is typically stored in a flash memory device on the system's motherboard.
BIOS通常存储在系统主板的一个闪存设备中。
The "unified" memory device, outlined in the journal IEEE Computer, is still undergoing testing.
根据《IEEE计算机》杂志的描述，这种“统一的”存储装置，仍在测试中。
The only Write operation permitted on a flash memory device is to change a bit from a one to a zero.
flash内存设备中惟一允许的Write操作是将1修改为0。
The invention provides a semiconductor memory device.
本发明提供了一种半导体存储器设备。
A method for fabricating a 3-d monolithic memory device.
一种用于制造3 - D单片存储装置的方法。
Now let's create a memory device context and select a new bitmap.
现在，让我们创建一个内存设备上下文，然后选择一个新的位图。
FIG. 14 depicts programming pulses applied to a cycled memory device.
图14描绘施加于循环存储器装置的编程脉冲。
Semiconductor memory device, display device, and portable electronic apparatus.
半导体存储器件，显示器件，以及便携式电子装置。
Command data for controlling the flash memory device is input to the controller 218.
用于控制快闪存储器装置的命令数据输入到控制器218。
A comparator receives both the read data from the memory device and the search data.
比较器从存储装置接收读数据以及搜索数据。
Embodiments relate to a nonvolatile memory device and a method for manufacturing the same.
本发明实施例涉及一种非易失性存储器件及其制造方法。
The invention further relates to method of protecting data in a non-volatile memory device.
本发明还 涉及一种对非易失性存储器器件中的数据进行保护的方法。
Provided is a resistance random access memory device and a method of fabricating, the same.
本发明涉及一种电阻型随机存取存储器及其制造方法。
The punctured data can be decoded (120, 122) when data is to be read from the memory device (100).
当将从所述存储器装置(100)读取数据时，可对所述经穿孔数据进行解码(120、122)。
In other designs, other parts of the memory device, such as the state machine, can calculate the ECC.
在其它设计中，存储器装置的其它部分(例如状态机)可计算ecc。
The semiconductor memory device includes a bit line sense amplifier connected to a pair of bit lines.
该半导体存储器件包含连接到一对位线的位线感测放大器。
The invention provides a memory cell transistor having multi-layer tunnel insulator and memory device.
本发明提供一种具有多层隧道绝缘体的存储器单元晶体管及存储器器件。
To a micro-controller, the PDIUSBD12 appears as a memory device 8-bit data bus and 1 address bit (occupying 2 locations).
对微控制器而言，PDIUSBD12看起来就像一个带8位数据总线和一个地址位（占用两个位置）的存储器件。
The display apparatus for a test-chart, the memory device and the keyboard are respectively connected with the processor.
所述视力表显示装置、存储器、键盘分别与处理器相连。
Additional levels of conductive rails and memory cell diodes are formed similarly to build the 3-d monolithic memory device.
类似地形成导电轨和存储单元二极管的附加层级，从而构建3- D单片存储装置。
The present application discloses a single cell non-volatile semiconductor memory device for storing two-bits of information.
本申请公开了一种单元非易失性半导体存储器件，用于存储两位信息。
GDI output functions can be used with a memory device context only if a bitmap has been created and selected into that context.
GDI的输出函数只有当内存设备环境上有了位图画布之后，才能进行输出。
In various embodiments of the invention, a memory device includes at least one sense amplifier with an asymmetrical configuration.
在本发明的各实施例中，一种存储装置包含呈不对称配置的至少一个检测放大器。
The memory device comprises a plurality of service routines stored at different entry addresses, each related to an interruption request.
存储器装置包含多个存储于不同项目地址的服务例程，每个服务例程关联一个中断请求。
Such a flash memory device is sometimes referred to as a binary flash memory device because each memory element can store one bit of data.
这种快闪存储器装置有时称为二元快闪存储器装置，因为每个存储器元件可存储一个数据位。
The memory device comprising the sensing amplifier and the ROM can reduce the influence of noise interference on the output data of the ROM.
包含本发明的感测放大器以及只读存储器的存储器装置可降低噪声干扰对只读存储器的输出数据的影响。
In addition, when an initial value of the output data has an error, the memory device can correct the wrong output data into correct output data.
此外，如果输出数据的初始值有错误时，存储器装置亦可将错误的输出数据修正为正确的输出数据。
The memory device includes M normal word line drivers, a dummy word line driver, a memory array, N sense amplifiers, and a timing control circuit.
所述存储器装置包括M个正规字线驱动器、虚设字线驱动器、存储器阵列、N个读出放大器和时序控制电路。
The semiconductor memory device can reduce the writing current thereof without degrading the magnetic resistance value and thermal stability thereof.
本发明的半导体存储装置可降低其写入电流且不会劣化其磁阻值与热稳定性。
In the nonvolatile memory device, data may be erased from the memory transistors by applying an erasing voltage to the bit line or the common source line.
在非易失性存储装置中，可以通过将擦除电压施加到位线或共源线来从存储晶体管擦除数据。
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