Besides, the Karnaugh map method and algebra method are presented for designing component level circuits.
此外，本文提出元件级电路设计的卡诺图方法和代数方法。
The XOR map is presented that is a graphic for design base on exclusive-OR gate circuits and is follow the example of the Karnaugh map.
仿效卡诺图设计了以异或门为基本电路的电路设计用图—异或图。
Through to the encoder truth table characteristic analysis, has obtained the direct writing logical expression concrete method using the Karnaugh map most minor term merge rule.
通过对编码器真值表的特点分析，利用卡诺图最小项合并规则得出了直接书写逻辑表达式的具体方法。
应用推荐