• In this thesis, a high-speed, low-power and third-order current-mode charge-pump PLL is designed according to the CDMA standard by in-depth analyzing and researching the principle of PLL.

    通过相环原理进行深入分析研究论文针对CD MA无线通信标准设计出了高速功耗三阶电流型电荷泵锁相环。

    dict.cnki.net

  • Because of the merit of integrated easily, low power, low jitter, small phase difference error and big capture scale, the CPPLL (Charge-pump PLL) has become one of the major digital PLL product.

    电荷泵环具有易于集成功耗、低抖动、频率牵引范围大和静态相位误差优点成为了当前数字锁相环产品主流

    www.fabiao.net

  • A passive loop filter scheme and the design method of the filter for current charge pump PLL frequency synthesizer chip are given in the paper.

    针对电流型电荷PLL频率综合器芯片提出种称为极值相位裕量无源环路滤波器方案设计方法

    dict.cnki.net

  • A novel multi-layer Charge-Pump Phase-Locked Loop (CP-PLL) behavioral model is presented in this paper.

    提出种全新电荷锁相行为建模方法。

    dict.cnki.net

  • A novel multi-layer Charge-Pump Phase-Locked Loop (CP-PLL) behavioral model is presented in this paper.

    提出种全新电荷锁相行为建模方法。

    dict.cnki.net

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