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gate array
[ˈɡeɪt əreɪ] [ˈɡeɪt əreɪ]

  • [电子][计] 门阵列;门数组

网络释义专业释义英英释义

  [电子] [计] 门阵列

Gate Array门阵列):应用电子技术专业。通过逻辑单元阵列连接的集成电路,设计者只需要简单地点击鼠标,ispLSI。

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  门数组

门数组(gate array), 此释义来源于网络辞典。

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  闸阵列

(1)闸阵列Gate Array):以一基本电路布局所构成的母体,依据不同应用需求加上三至四层光罩形成不同细部架构的ASIC;特点为因光罩数少,故需支出之NRE(...

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  闸门阵列

... gate1 进模口2闸 gate array 闸门阵列 gate cutting 切断成型铸模树鲁流导闸门之残留树脂 ...

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短语

Field Programmable Gate Array 现场可编程门阵列 ; 现场可编程逻辑门阵列 ; 现场可编门阵列 ; 门阵列

gate array approach 门阵列法

gate array chip 门阵列芯片

programmable gate array 可编程门阵列 ; 可编程序门阵列 ; 现场可编程门阵列

gate array master chip 门阵列芯片

gate array integration 门阵列集成电路

channeled gate array 沟槽门阵列

masked gate array 掩膜式门阵列

Gate-Array Device 栅陈列 ; 栅阵列

 更多收起网络短语
  • 闸阵列
    门阵列
  • 门阵列 - 引用次数:157

    The UE consists of one Field Programmable Gate Array(FPGA) and two Digital Signal Processors(DSP). UE physical channel are implemented, which can be used in TD-LTE test.

    该终端由1个现场可编程门阵列和2个数字信号处理器构成,能够实现手机物理层的上下行链路。

    参考来源 - TD
    闸阵列
  • 门数组
  • 门数组
    闸阵列

·2,447,543篇论文数据,部分数据来源于NoteExpress

Gate array

  • abstract: A gate array or uncommitted logic array (ULA) is an approach to the design and manufacture of application-specific integrated circuits (ASICs), using a prefabricated chip with active devices like AND-gates etc. that is later interconnected according to a custom order by adding metal layers in the factory environment.

以上来源于: WordNet

双语例句

  • Gate array and standard cell are the two major methods.

    阵列标准单元两种主要方法

    youdao

  • A design project based on Field Programmable Gate Array (FPGA) for multi-channel electronic tablet counter is introduced.

    介绍一种基于现场可编程阵列(FPGA)多通道电子设计方案

    youdao

  • The design idea and system architecture of costumed fiber channel adapter was proposed based on field programmable gate array.

    基于现场可编程阵列定制的光纤通道适配器,提出设计思路系统结构

    youdao

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